CPU Simulation - Instruction Set
Introduction
This instruction set documents all the instructions which may be used to construct executable programs on the CPU Simulation. Each instruction has a mnemonic (e.g. LDA #$00 - for load accumulator immediately with the hexadecimal quantity 00), followed by the opcode (in hex) and a short description of what the instruction does.
This is then followed by a detailed description of each inter-register transfer that takes place in order to carry out the instruction. You can check this in the simulation by using the Step1 button - which acts like the system clock.
The actual instruction set begins on the next page.
Instruction Set
1. LDA #$XX Opcode = A0 Load ACC immediately from memory.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => ACC 5
2. LDA $XX Opcode = A1 Load ACC from memory location.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR => ACC 5
3. STA $XX Opcode = B0 Store ACC in memory location.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
ACC => MDR 8
MDR => (M) 22
4. LDA X Opcode = A2 Load ACC via index register.
XR => MAR 19
(M) => MDR 2
MDR => ACC 5
5. STA X Opcode = B1 Store ACC via index register.
XR => MAR 19
ACC => MDR 8
MDR => (M) 22
6. INC Opcode = A3 Increment ACC.
ACC+1 => ACC 6
7. DEC Opcode = A4 Decrement ACC.
ACC-1 => ACC 7
8. INX Opcode = C0 Increment index register.
XR+1 => XR 20
9. DEX Opcode = C1 Decrement index register.
XR-1 => XR 21
10. ADD #$XX Opcode = A5 Add immediate value to ACC.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
ACC+MDR => ACC 9
11. ADD $XX Opcode = B2 Add location value to ACC.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACC+MDR => ACC 9
12. SUB #$XX Opcode = A6 Subtract immediate value to ACC.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
ACC-MDR => ACC 10
13. SUB $XX Opcode = B3 Subtract location value from ACC.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACC-MDR => ACC 10
14. INV Opcode = A7 Logically invert contents of ACC.
^ACC => ACC 14
15. XOR #$XX Opcode = A8 Logically XOR ACC immediately.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACCÅ MDR => ACC 11
16. XOR $XX Opcode = B4 Logically XOR ACC directly.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACCÅ MDR => ACC 11
17. AND #$XX Opcode = A9 Logically AND ACC immediately.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACC.MDR => ACC 12
18. AND $XX Opcode = B5 Logically AND ACC directly.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACC.MDR => ACC 12
19. OR #$XX Opcode = AA Logically OR ACC immediately.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACC|MDR => ACC 13
20. OR $XX Opcode = B6 Logically OR ACC directly.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
ACC|MDR => ACC 13
21. INCM $XX Opcode = D0 Increment memory location.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR+1 => MDR 26
MDR => (M) 22
22. DECM $XX Opcode = D1 Decrement memory location.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR-1 => MDR 27
MDR => (M) 22
PC+1 => PC 4
PC => MAR 1
MDR => XR 17
PC+1 => PC 4
PC => MAR 1
MDR => MAR 23
MDR => XR 17
25. STX $XX Opcode = C4 Store XR to memory.
PC+1 => PC 4
PC => MAR 1
MDR => MAR 23
XR => MDR 18
MDR => (M) 22
00 => ACC 24
00 => XR 25
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => PC 28
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => PC 28
PC+1 => PC 4
PC => MAR 1
MDR => PC 28
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => PC 28
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => PC 28
SP+1 => SP 30
SP => MAR 29
XR => MDR 18
MDR => (M) 22
PC +1 => PC 4
PC => MAR 1
PC +1 => PC 4
PC => XR 34
MDR => PC 28
SP+1 => SP 30
SP => MAR 29
XR => MDR 18
MDR => (M) 22
SP => MAR 29
MDR => PC 28
SP-1 => SP 31
SP => MAR 29
MDR => XR 17
SP-1 => SP 31
PC+1 => PC 4
PC => MAR 1
MDR => PC 28
36. LDS #$XX Opcode = F0 Load Stack Pointer immediately.
PC+1 => PC 4
PC => MAR 1
MDR => SP 33
37. LDS $XX Opcode = F1 Load Stack Pointer directly.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR => SP 33
38. STS $XX Opcode = F2 Store Stack Pointer.
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
SP => MDR 32
39. POP Opcode = F3 Pop ACC off stack.
SP => MAR 29
MDR => ACC 5
SP-1 => SP 31
40. PSH Opcode = F4 Push ACC on to stack.
SP+1 => SP 30
SP => MAR 29
ACC => MDR 8
MDR => (M) 22
41. POPX Opcode = F5 Pop XR off stack.
SP => MAR 29
MDR => XR 17
SP-1 => SP 31
42. PSHX Opcode = F6 Push XR on to stack.
SP+1 => SP 30
SP => MAR 29
XR => MDR 18
MDR => (M) 22
PC+1 => PC 4
PC => MAR 1
ACC - (M) (flags) 35
PC+1 => PC 4
PC => MAR 1
XR - (M) (flags) 36
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR => ACC 5
PC+1 => PC 4
PC => MAR 1
(M) => MDR 2
MDR => MAR 23
(M) => MDR 2
MDR => MAR 23
ACC => MDR 8
MDR => (M) 22
ACC*2 => ACC 15
ACC/2 => ACC 16