What is JTAG

• Joint Test Action Group(international group of electronic manufactuers, including Texas instruments)
• IEEE standard 1149.1-1990
• The circuitary contains an interface through which instructions and test data are communicated
• The IEEE 1149.1-1990 standard requires a test interface known as the Test Access Port(TAP)

TAP's 4 required signals

• Test Mode Select(TMS)
• Test Clock(TCK)
• Test Data In(TDI)
• Test Data Out(TDO)
• Test Reset : Optional

TAP controller

• The TAP controller is a 16-state, finite-state machine programmed by TMS and TCK inputs
• The Capture state loads data or instruction bits in parallel into the data or instruction registers
• The Shift state moves the captured data or instruction out through TDO and simutaneously allows new data or instructions to be shifted in through TDI
• The Update state causes the newly shifted data to be latched onto the parallel outputs of the selected register

JTAG's 4 data registers

1. Boundary-scan (required)
2. Bypass (required)
3. Deivice ID (optional)
4. User-defined (optional)