-- xor_1bit.vhd
LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all;
ENTITY xor_1bit IS PORT ( x, y : in std_logic; o : out std_logic); END xor_1bit;
ARCHITECTURE maxpld OF xor_1bit IS BEGIN
o <= x XOR y;
END maxpld;