-- not_1bit.vhd

            LIBRARY ieee;
            USE ieee.std_logic_1164.all;
            USE ieee.std_logic_arith.all;

            ENTITY not_1bit IS
            PORT (  x  : in std_logic;
                        o  : out std_logic);
            END not_1bit;

            ARCHITECTURE maxpld OF not_1bit IS 
            BEGIN

            o <= NOT x;

            END maxpld;