-- mux2to1_1bit.vhd

            LIBRARY ieee;
            USE ieee.std_logic_1164.all;
            USE ieee.std_logic_arith.all;

            ENTITY mux2to1_1bit IS
            PORT (  a, b, s  : in std_logic;
                              o    : out std_logic);
            END mux2to1_1bit;

            ARCHITECTURE maxpld OF mux2to1_1bit IS
            BEGIN 
               PROCESS(a,b,s)
                   BEGIN
                   IF(s='0') THEN
                      o <= a;
                   ELSE
                      o <= b;
                   END IF;
               END  PROCESS;

             END maxpld;