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   DECODER 4 to 2 : dec4to2.gdf
                             dec4to2.vhd

   [SCH]



   [VHDL]

            -- dec4to2.vhd

            LIBRARY ieee;
            USE ieee.std_logic_1164.all;
            USE ieee.std_logic_arith.all;

            ENTITY dec4to2 IS
            PORT (  a  : in std_logic_vector(3 downto 0);
                        o  : out std_logic_vector(1 downto 0));
            END dec4to2 ;

            ARCHITECTURE maxpld OF dec4to2 IS
            BEGIN 
               process
                  begin
                     case a is
                                   when "0001" => o <= "00";
                                   when "0010" => o <= "01";
                                   when "0100" => o <= "10";
                                   when "1000" => o <= "11";
                                   when others => o <= "XX";
                  end case;
                end process;
             END maxpld;
 


   [RESULT]
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