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   DLATCH_Enable 1 : dlatch_en.gdf
                                dlatch_en.vhd

   [SCH]

   [VHDL]

            -- dlatch_en.vhd

            LIBRARY ieee;
            USE ieee.std_logic_1164.all;
            USE ieee.std_logic_arith.all;

            ENTITY dlatch_en IS
            PORT (  data, enable   : in std_logic;
                                      q    : out std_logic);
            END dlatch_en;

            ARCHITECTURE maxpld OF dlatch_en IS 
            BEGIN
               process(data, enable)
               begin
                 if (enable='1') then
                    q <= data;
                 end if;
               end process;
             END maxpld;
 


   [RESULT]

 
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