1394
This bus is referenced as: IEEE-1394 and FireWire.
A0-A7
A processor chip's byte code sequencer address
registers.
AC
Alternating Current swings from positive to negative in a
cyclic pattern.
AC
A processor chip's Arithmetic Cluster which performs
arithmetic computations. It consists of the AP (Arithmetic
Processor), CP (Control Processor) arithmetic units, and TP
(Transfer Processor) controller.
ACM
A processor chip's Arithmetic Cache Memory is associated
with the arithmetic cluster.
Acoustic
Coupler
A device that allows a computer to link to a public
telephone line&emdash;even if there is only a conventional
handset, and no wall jack (or extension) provided. Just sit
the handset on the coupler. Then transmit. The coupler
coverts ("modulates") electrical signals into audio
signals.
ADL
Automated data tape library (drive), usually composed of 4mm
(.157 inch-wide) DAT, QIC, 8mm (.315 inch-wide), DAT or
half-inch Linear tape drives. The key parameters are
data-storage capacity and data-transfer speed.
Active
Matrix Monitor
These flat-panel monitors may use either thin-film
transistors (TFTs) or super-twisted nematic (STN) liquid
crystal diodes (LCDs), and either the standard low voltage
differential signaling (LVDS) digital interface or a
proprietary algorithm that eliminates some of the effects of
a noisy input signal inherent in standard analog RGB monitor
interface.
Actuator or
Positioner
A motorized assembly used in electronics because its
percision movement can be digitally-controlled. There are
many applications; such as, positioning read/write heads in
hard drives over sector locations and positioning a
satellite dish to a satellite's location.
ACU
A processor chip's Arithmetic Control Unit.
AG
A processor chip's Address Generator in Sequencer.
AGP Advanced Graphics Port
This bus is based on Revision 2.1 of the 66MHz PCI
specification. On a systemboard with a standard PCI bus, it
is a separate bus. The AGP bus is designed to provide
graphicboards with better support for high-textured 3D
images than the PCI bus. It provides the board's graphic
chip with direct access to textures stored in system RAM.
(To increase the frames-per-second rate, increase the
board's local RAM.)
AGP yields a 528 MByte per second peak bandwidth by transferring data on both the rising and falling edges of the 66MHz clock. For any frames-per-second rate, AGP uses far less of its MByte-per-second bandwidth than PCI or PCI-66; roughly half of what PCI-66 would use and roughly a quarter of what PCI would allocate. (Using a AGP graphicboard rather than a PCI graphicboard will make available more bandwidth on the PCI bus for consumption by other installed PCI boards. Plus there is a performance advantage.)
AGP incorporates sideband signals (even if there is no graphics chip). If there is a graphics chip, it is thereby enabled to pipeline and queue memory requests; new addresses and requests can be issued while the bus is transferring data from previous requests. With AGP support, a graphics chip can implement double-rate or frame-mode PCI.
Note: PC What's The Problem? includes identification, test, repair and replacement suggestions.
AIFF
44KHz. (The
maximum sample rate is 48KHz.)
Amperes
It is the rate of an electrical flow. An ampere,
(abbreviated as: A, or amps) is equal to one-coulomb (6.25 x
1018 electrons) charge moving through a conductor, such as a
wire&emdash;per second. (The conductor is the variable
factor.) Amps are always related to electrical flow,
(generally known as "current") over a unit of time. For
example, batteries are rated by the total number of
electrons they can pump in a number of hours.
Multiplying amps by hours results in: amp-hours. A relatively low flow of electrons is measured in milli-amperes; abbreviated as: mA. (1000mA = 1A.) A very-low flow is measured in micro-amps; represented as: µA. (1000-µA = 1mA.)
Amplitude
Modulation
Digital-data "bit" can be transmitted as either a
"low-voltage" pulse (0), or a "high-voltage" pulse (1). A
digital character is sent as a coded sequence of high and
low wavelike pulses.
Alternating
Electrical Current (AC)
A wavelike pulse that modulates from positive to negative
polarity (+,-) as it travels through a wire. This
"sine-wave" traces the pulse's movement from 0 degree in a
positive arc to 180 degrees, then in a negative arc, of
equal shape, back to 0 degree. (Defects in the wire, power
surges, and the effects of outside interference cause
"noise" and "spikes" in the pulse.)
AP
A processor chip's Arithmetic Processor which controls the
arithmetic unit.
APL
A processor chip's Arithmetic Pipeline. The AU arithmetic
hardware consisting of the SWX, FEU, CGS (Coefficient
Generation System), FPP, and PLC.
Areal
recording density
The bit density multiplied by the track density: the number
of bits per inch (bpi) of track-0, multiplied by the number
of tracks per inch (tpi) from hub to rim, results in the
number of bits per square inch. (Track-0, the first track
out from the hub, has the smallest circumference and
therefore the most densely-packed sectors.)
ASC
A processor chip's Array Systems Computing.
ASIC
Application Specific Integrated Circuit chip.
Asymmetrical Duplex
Provides simultaneous transmission, one direction at
low-speed, the other at high-speed.
Asynchronous communications
("async")
With this protocol, sending and receiving systems do not
synchronize transmissions. A system receiving a sequence of
data-bits (one-at-a-time) cannot interpret them as distinct
characters. A start-bit and one or two stop-bits are added
by the modem (often along with a parity-bit for error
detection) to each 8-bit character. Usually, but not always,
a "1" data-bit is used for a start-bit. (It tells the
receiving modem that more data will follow.) The seven or
eight bits that follow it define a character-byte. For high
speeds, a single stop-bit is used to indicate that the
previous 8 bits define an ASCII character-byte. For slow
speeds, two stop-bits may be used. Stop bits are usually,
but not always, a "1" data-bit. Without the start- and
stop-bit frame, the receiving device would not be able to
identify the bits for conversion back to 8-bit characters,
or detect transmitted errors.
The stop-, start- and parity-bits, must be added at the sending side and stripped off at the receiving side. This more bits-to-a-character results in slower character transmission.
Asynchronous communications requires less sophisticated and less expensive instrumentation than synchronous; that is why it is the most common form of communications for PCs. Mini and mainframe computers use 7-bit characters, and if made by IBM™, they usually require synchronous communications.
Asychronous
Connection
The type of connection a modem makes over a phone line, this
connection is not synchronized by a mutual timing signal or
clock.
Asymmetrical Duplex
Provides simultaneous transmission, one direction at
low-speed, the other at high-speed.
Asynchronous Terminal
Emulation
This type of protocol, a.k.a., "Dumb Terminal Emulation,"
provides one-line-at-a-time control between two PCs, and
full screen control between a PC and a mini- or mainframe
computer. Communications software usually provides PC with
the codes to emulate terminals normally connected to a
minicomputer and/or mainframe computer.
Emulation usually include terminals connected to these types of "Host" computers: DEC's VT 52,100, and 102 (which connect with all DEC™ VAX computers), IBM's 3101 (for IBM™ systems using time share option, TSO), Televideo's 912, Lear Siegler's ADM-3, Zenith-19, Telex, and several others.
Check to see if the terminal-emulator software provides all of the terminal's features, and not just a subset of them. Confirm the presence of these features: a, cursor position control; b, tab movement between data input fields; c, character delete; and d, screen highlighting, blinking, reverse video and graphic characters.
ATAPI
(AT Attachment Packet Interface) protocol supports up to 4
EIDE devices: floppy, hard, CD, MO, and tape drives and
direct data transfers between the devices. Data transfer
speeds may be between 13.3 and 16 Megabytes per second
(MBps). (An IDE controller can only handle 2
drives, either hard or floppy disk drives.) EIDE's dual channel design has two
40-pin connectors. Each one is functionally identical to the
IDE's, except for the addition of three new ATAPI commands.
The primary high-speed connection to disk drives and a
secondary slow-speed channel to non-disk peripherals.
IDE drives are limited to 528MB because of the cylinder, head, and sector definitions of both the AT's BIOS Interrupt 13 and the standard IDE interface. EIDE handles drives with data storage capacities up to 8.4GB via a BIOS translation based on either logical block addressing (LBA) or traditional cylinders, head, sector (CHS) method. Intel and Compaq are embedding EIDE within the PCI-bus support chipset.
Attenuation
The maximum guaranteed reduction in power, volume or
amplitude of a signal, ranging outside a specified frequency
span. A cable specification that measures, in decibels, the
loss in strength (amplitude) of an electrical signal as it
travels through a wire. Spurious response attenuation is the
minimum acceptable attenuation in the stop band which allows
for unwanted modes in the systemboard's crystal.
AU A processor chip's Arithmetic Unit consisting of an SEQ, iRAM, ACM, SWX, FEU, CGS (Coefficient Generation System), FPP, and PLC.
AUI A processor chip's AU Interconnect. The switch connecting the caches of the eight arithmetic units.
Average
Access Time
Data stored on a disk is considered as latent until it is
retrieved. It takes some time for a head to seek (move) to a
specified cylinder-track and for the spinning platter to
rotate the specified sector under the head for access. The
seek time plus the rotational latency-time equal the
access-time. The time it takes to randomly read and write to
all sectors is averaged. This average access time is
calculated in milliseconds (ms). It is a measure of drive
performance.
AV or Audio
Video
(Or "Added Value") implies that a drive is suitable for use
in audio or video performance. For IDE and EIDE "AV" drives,
high rotational speed allows capturing video at low
compression rates (as low as 16-to-1 for IDE drives and
7-to-1 for EIDE drives) and their thermal recalibrations
cause fewer frames to be dropped every two minutes recorded.
SCSI drives allow lower compression rates and lose fewer
frames than EIDE drives, therefore they are more suitable
for AV tasks.
Baseband
A transmission method in which a network uses its entire
transmission range to send a single signal. Contrast with
Broadband transmission.
Baud
A unit of speed in data transmission, or the maximum speed
at which data can be sent down a channel. Baud is often
equivalent to bits per second. Named after J. M. E. Baudot
(died 1903).
BBS
Bulletin Board System located in a "host" computer equipped
with database and telecommunications software, modem and
phone linne so that it can interact with remote computer
systems via telephone lines.
BEDO-DRAM
Burst EDO-DRAMs are referenced in:
EDO-DRAM.
Bell modems
Series
Series 100 for Narrowband; 200 for Voiceband; 300 for
Broadband; 400 for parallel Voiceband. Some use odd versions
of the EIA specifications for the RS-232-C interface.
Bell-103
These (AT&T-standard) modems provide 300 bps, full
duplex transmission.
Bell-212
These modems provide 1200 bps, full duplex communications;
-212A DCE, pin-12 is odd.
Big
endian
In memory, the organization in memory of bytes within a word
with the most significant byte placed at the lowest address.
Contrast this arrangement with "Little endian" where the
least significant byte occurs at the lowest address.
Bipolar
transistors
They are referenced with the other transistors.
BIST
Built-In Selftest.
Boot
record
Operating system-specific code that is placed on a specially
formatted disk at track 0, head 0, which is the position at
which the disk is first read--which indicates that the disk
also contains the minimum code (files) to activate the
operating system
bps
Bits per sector (indicated if not 512).
BSC or
"bisync"
Binary Synchronous Communications (or "Bisync"), serial data
transmission which uses a clock-bit to synchronize
communication signals between two networked computers. Refer
to Synchronous
Communications.
Buffer
Cache
Buffer RAM capacity on the drive, temporarily stores data
read from the drive according to a algorithm in anticipation
of a near-term request for it. Other reference: cache.
For telecommunications, a buffer is a storage device used to compensate for the difference in data rate and data flow between two devices.
Byte
A data-structure element representing a character with a
value from 0 to 255.
A data character made up of 8 bits which is made distinct from other bytes--sent before and after it--by the inclusion of a start bit and an end bit.
References are samples only. Each one is presented in greater detail in the
Technical Research Assistant for 2001
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